Metal oxide semiconductor field effect transistors (MOSFETs) are commonly used in power transistor applications such as switching power supplies, power conversion, power management, energy systems, telecommunications, personal computer applications, motor control, automotive, and consumer electronics. Power devices generally refer to transistors and other semiconductor devices that are capable of switching about 1.0 ampere or more of conduction current. Power MOSFETs are well known as high input impedance, voltage-controlled devices which require a relatively small charge to initiate turn-on from simple drive circuitry. The power MOSFET ideally exhibits high drain-to-source current carrying capacity, low drain-to-source resistance (RDSon) to reduce conduction losses, high switching rate with low switching losses, and high safe operating range (SOA) which provides the ability to withstand a combination of high voltage and high current.
Power MOSFETs are often vertical devices used in combination with a lateral driver circuit. The driver circuit may be as simple as a p-channel transistor and an n-channel transistor connected in a totem-pole arrangement. Other driver circuits are known to have additional features. The junction between the drain of the p-channel transistor and the drain of the n-channel transistor is the output of the driver circuit, which is coupled to the gate of the power MOSFET. In one operating mode, the p-channel transistor of the driver circuit is turned on to source current directly into the gate of the power MOSFET. In another operating mode, the n-channel transistor of the driver circuit is turned on to sink current directly away from the gate of the power MOSFET. The driver circuit must supply sufficient current to charge and discharge the gate voltage of the power MOSFET. The driver circuit thus operates to turn on and off the power MOSFET in a rapid and efficient manner.
The driver circuit is typically a low voltage device, operating in the range of 5–25 volts. The power MOSFET is a higher voltage device, operating in the range of 20–30 volts. The lateral driver circuit is usually placed on the same base silicon substrate as the power device. For efficient layout considerations, the lateral driver circuit is often located in proximity to the power MOSFET.
In constructing the lateral devices, an N-epi layer is disposed above the silicon substrate. A first p-well is formed in the N-epi layer for the n-channel transistor, and an n-well is formed within the first p-well for the p-channel transistor. A second p-well is also formed in the N-epi layer for the power device. The second p-well is located in proximity to but separated from the first p-well by an N-epi region.
Depending on the operating voltage and operating frequency of the power device, the lateral driver circuit may be subject to junction leakage in the form of carrier injection from the power device. The lateral driver circuit can also be subjected to switching noise from power device. The first and second p-wells are separated by N-epi, which form a PN junction. The PN junction ideally provides isolation, but can become forward biased in certain circumstances. Any conduction between the power MOSFET and driver circuit could be problematic or detrimental to the operation of the IC.
A need exists to maintain isolation between the power MOSFET and the lateral driver circuit.